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november 2010 doc id 18113 rev 1 1/13 AN3299 application note a hardware and software guide for the stmpe801 8-bit port expander xpander logic? introduction the stmpe801 is a gpio (general purpose input/output) port expander able to interface a main digital asic via the two-line bidirectional bus (i 2 c). it offers flexib ility as each i/o is configurable as input, output. this device has been designed with very low quiescent current, and includes a wake up feature for each i/o, to optimize the power consumption of the ic. this document highlights the guidelines and information complementary to the stmpe801; 8-bit port expander xpander logic tm , datasheet that is necessary for the successful design of stmpe801 in applications. please also refer to the an2421; using stmpe801 as keypad controller , application note for implementation of a matrix keypad controller with the stmpe801. the first part of the document highlights information on the hardware including external components/connectivity, power, etc. the second part of the document focuses on information regarding the software, in which programming sample codes are shown. www.st.com
contents AN3299 2/13 doc id 18113 rev 1 contents 1 hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1.1 typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1.2 reset pin recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1.3 int pin recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2.1 power sequence (fail safe) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3 gpio output configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3.1 push-pull . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3.2 open drain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.4 unused input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.5 suspend mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 i2c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.1 i2c initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.2 i2c address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.3 i2c address update/reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 programming guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.1 initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.2 interrupt handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 hotkey de-bounce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
AN3299 list of figures doc id 18113 rev 1 3/13 list of figures figure 1. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 2. rstb connectivity recommendation 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. rstb connectivity recommendation 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. rstb connectivity recommendation 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. gpio push-pull configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 6. gpio open drain configuration (output low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 7. gpio open drain configuration (output high) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 8. typical programming flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
hardware AN3299 4/13 doc id 18113 rev 1 1 hardware 1.1 external components 1.1.1 typical app lication circuit figure 1. typical application schematic note: recommended connection at reset is based on the use of baseband/cpu gpio as control signal. please refer to section 1.1.2 for other recommended configurations. sclk and sdata pull up must be to vcc. pull up to voltage that is less than or greater than vcc may result in excessive leakage current. in a typical application, the following external components are required: r1: 10 k pull-up resistor at reset r2: 2.2 k -10 k pull-up resistor at int r3: 2.2 k -10 k pull-up resistor at sclk r4: 2.2 k -10 k pull-up resistor at sdata r5: 1 m pull-up/down resistors at address c1: 100 nf capacitor at vcc c2: 100 nf capacitor at vio !-v 9,2 9& & &/2&. '$7$ ,17 5hvhw *1' 9 9 6703( 6'$ 6&/ ,17b1 567b1 5 5 5 5 5 9 9 & & *3,2 *3 ,2 *3,2 *3,2 *3,2 *3,2 *3,2 *3,2 $gguhvv ,2 ,2 ,2 ,2 ,2 ,2 ,2 ,2 9,2 9& & &/2&. '$7$ ,17 5hvhw *1' 9 9 6703( 6'$ 6&/ ,17b1 567b1 5 5 5 5 5 9 9 & & *3,2 *3 ,2 *3,2 *3,2 *3,2 *3,2 *3,2 *3,2 $gguhvv ,2 ,2 ,2 ,2 ,2 ,2 ,2 ,2
AN3299 hardware doc id 18113 rev 1 5/13 1.1.2 reset pin recommendation the following is a few examples of configurations at the reset pin. if a reset delay is desired (recommended) upon power up, an rc delay can be connected to the reset as shown below. figure 2. rstb connectivity recommendation 1 if external reset assertion is required through cpu/baseband, rstb can be connected to the gpio. the diagram below shows the presence of a weak pull-up resistor assuming cpu/baseband control is open drain. the minimum pulse width of the external reset signal is 100 s. figure 3. rstb connectivity recommendation 2 if reset delay and external reset assertion, as shown in case1 and case2 above, are not required, it is recommended to short the reset pin to vcc through a low resistor of 0.1 - 100 . !-v 2eset 6## 6n 6 6## 34-0% am0 8 426v1 re s et vcc 1.65 v ? 3 .6 v s tmpe 8 01 cpu control 10 k vcc cpu control
hardware AN3299 6/13 doc id 18113 rev 1 figure 4. rstb connectivity recommendation 3 1.1.3 int pin recommendation the int pin is programmable active low or active high. when programmed to active low, a pull-up resistor of 2.2 k -10 k is required. when programmed to active high, a pull-down resistor of 2.2 k - 10 k is required. if the int signal is not in use, it is necessary to pull the int pin to vcc. 1.2 power supply there are 2 voltage supplies, vio and vcc, to the stmpe801. vio is the core voltage supply to the internal circuits and powered gpio_0 to gpio_7. vcc is the supply for the i 2 c blocks. the operating vcc and vio voltage range is 1.65 v to 3.6 v. an internal por circuit monitors the vio supply and holds stm pe801 in reset state until vio is valid. in order to prevent possible leakage, it is necessary to ensure vio vcc. 1.2.1 power sequence (fail safe) in order to ensure a proper power up of stmpe801, it is necessary to turn on supply to vio first and then follow with vcc, if vio and vcc are connected to a different supply voltage. all gpio pins of the stmpe801 are in fail safe structure. this means that it is possible to leave gpio pins driven before stmpe801 power supply on. it is recommended to connect the sclk and sdata pull-up resistors to the same supply as vcc. if a different supply is used, it is reco mmended to first turn on supply to vcc and then follow by the sclk and sdata pull-up supply. 1.3 gpio output configurations the stmpe801 provides push-pull type of gpio output as is. if open drain gpio outputs are required, it is configurable with a tweak to the software programming routine. see figures 5 , 6 , and 7 . !-v 2eset 6# # 6n 6 34-0% ?
AN3299 hardware doc id 18113 rev 1 7/13 1.3.1 push-pull set the gpio to output state through the gpdr (0x12) register. input path is disabled. output path is enabled in push-pull configuration. figure 5. gpio push-pull configuration 1.3.2 open drain gpio output driven low by stmpe801 set the gpio to output state through the gpdr (0x12) register. input path is disabled. set the output state to low through the gpsr (0x11) register. output path is enabled and gpio pin pulled low. figure 6. gpio open drain configuration (output low) gpio output pulled high by external pull-up resistor set the gpio to input state through the gpdr (0x12) register. input path is enabled and output path disabled. gpio is pulled high by the external pull-up resistor. !-v /54054 ).054 '0)/x enabled disabled 34-0% /54054 ).054 '0)/x enabled disabled !-v /54054 ).054 enabled disabled %xternal pu llup '0)/,/7 '0)/x 6## 34-0% /54054 ).054 enabled disabled %xternal pu llup '0)/,/7 '0)/x 6##
hardware AN3299 8/13 doc id 18113 rev 1 figure 7. gpio open drain configuration (output high) 1.4 unused input pins if any of the input pins (gpio, reset, and address pins) are not required or unused in the application, it is necessary to make sure that these pins are either biased to high or low through external pull-up/down resistors. this is to prevent any excessive leakage current. 1.5 suspend mode if no access to stmpe801 is required, it is possible for the host to turn off the i 2 c block through the sys_ctrl register (0 x04). this shuts down the i 2 c block completely and results in minimum current consumption. a hardware assertion from the host at the reset pin is required to wake up the i 2 c block and the device in normal operating mode. !-v /54054 ).054 disabled enabled %xternal pu llup '0)/()'( '0)/x 6## 34-0% /54054 ).054 disabled enabled %xternal pu llup '0)/()'( '0)/x 6##
AN3299 software doc id 18113 rev 1 9/13 2 software 2.1 i 2 c 2.1.1 i 2 c initialization it is recommended to insert the software reset as the first command during initialization before starting the i 2 c transaction. 2.1.2 i 2 c address up to two i 2 c addresses (0x82 and 0x88) are available through the address pin. in other words, a maximum of 2 pieces of stmpe801 can be used sharing the same i 2 c bus. 2.1.3 i 2 c address update/reset address bits are reset and updated in the following 3 conditions: 1. power down/up (por) 2. software reset 3. hardware reset 4. general call reset
software AN3299 10/13 doc id 18113 rev 1 2.2 programming guide figure 8. typical programming flow 2.2.1 initialization the following is an example for device initialization based on standard implementation for gpio. gpio initialization (e.g. gpio to output) writeregister(sys_ctrl, 0x80);//issue sw reset writeregister(gpio_set_dir,0x00); //set port to input writeregister(int_en_gpio_mask,0xff); //enable input interrupt readregister(int_sta_gpio); //clear all status in gpio status register writeregister(sys_ctrl,0x04); //active low, enable global interrupt !-v 6erify#hip)$ 6ersion)$ 393?#42,n3oftwarereset 393?#42, %nable!ll#lock '0)/#onfiguration )nterrupt3ervice #onfiguration
AN3299 software doc id 18113 rev 1 11/13 2.2.2 interrupt handling the following is a sample for the device interrupt/hotkey serving routine based on standard implementation. interrupt service routine on_interrupt gpio_int_status = readregister(int_sta_gpio); //read interrupt status register - is cleared on read. if((gpio_int_status & 0x80) == 0x80) // check for interrupt on gpio7 { // handle gpio interrupt } 2.3 hotkey de-bounce it is possible that a signal from a mechanical connector (e.g. a 3.5 mm earphone jack) is connected to the stmpe801 input as a hotkey input. in such a case, excessive noise is expected from the hotkey input due to the mechanical movement, which the stmpe801 is not equipped to filter. it is necessary that the host implements filtering or de-bouncing by polling the status bit in the inte rrupt status register (0x09).
revision history AN3299 12/13 doc id 18113 rev 1 3 revision history table 1. document revision history date revision changes 04-nov-2010 1 initial release.
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